Pulse counter employing parallel feed input with external gating to control sequencing

Claim 1

AN ELECTRIC PULSE COUNTING CIRCUIT COMPRISING A PLURALITY OF STAGES WHICH ARE EACH TO STORE A DIGIT OF DIFFERENT SIGNIFICANCE IN THE NUMBER COUNTED, EACH SAID STAGE COMPRISING FIRST AND SECOND INPUT CIRCUITS, FIRST AND SECOND OUTPUT CIRCUITS AND TWO TRANSISTORS THAT ARE CROSS-CONNECTED TO FORM BI-STABLE SWITCHING MEANS WHICH IS CONNECTED TO SAID INPUT AND OUTPUT CIRCUITS AND WHICH IS SWITCHABLE BY PULSES SUPPLIED TO SAID FIRST AND SECOND INPUT CIRCUITS TO FIRST AND SECOND STABLE STATES WHEREIN A PREDETERMINED OUTPUT SIGNAL IS SUPPLIED TO THE FIRST AND SECOND OUTPUT CIRCUIT RESPECTIVELY; AN INPUT PATH TO RECEIVE THE PULSES TO BE COUNTED; FIRST GATING CIRCUITS CONNECTED BETWEEN THE FIRST INPUT CIRCUITS RESPECTIVELY AND THE INPUT PATH; SECOND GATING CIRCUITS CONNECTED BETWEEN THE SECOND INPUT CIRCUITS RESPECTIVELY AND THE INPUT PATH; THESE FIRST AND SECOND GATING CIRCUITS FACILITATING THE SELECTIVE APPLICATION OF PULSES ON THE INPUT PATH TO THE INPUT CIRCUITS; FIRST CIRCUIT MEANS CONNECTING THE FIRST OUTPUT CIRCUIT OF THE STAGE THAT IS TO STORE THE DIGIT OF LOWEST SIGNIFICANCE IN SAID NUMBER TO THE SECOND GATING CIRCUIT OF THAT STAGE TO RENDER THIS GATING CIRCUIT RESPONSIVE TO THE PULSES WHEN THE PREDETERMINED OUTPUT SIGNAL IS APPLIED TO THIS FIRST OUTPUT CIRCUIT; SECOND CIRCUIT MEANS CONNECTING THE SECOND OUTPUT CIRCUIT OF THIS STAGE TO THE FIRST GATING CIRCUIT OF THIS STAGE TO RENDER THIS FIRST GATING CIRCUIT RESPONSIVE TO THE PULSES WHEN THE PREDETERMINED OUTPUT SIGNAL IS APPLIED TO THIS SECOND OUTPUT CIRCUIT; COINCIDENCE CIRCUITS WHICH ARE TO RENDER THE GATING CIRCUITS OF THE REMAINING STAGES RESPONSIVE TO SAID PULSES SELECTIVELY, WHEREBY SAID SWITCHING MEANS ARE SWITCHED BY SAID PULSES TO PARTICULAR STABLE STATES THEREOF REPRESENTING THE NUMBER COUNTED IN A BINARY SCALE OF NOTATION, AND OF WHICH FIRST COINCIDENCE CIRCUITS ARE EACH CONNECTED TO THE FIRST GATING CIR-