Stair-step counter with pulse storage capacitor triggering, via anti-leakage diode, transistor blocking oscillator

Claim 1

COUNTING APPARATUS COMPRISING: A SOURCE OF SIGNAL PULSES; A STAIR-STEP COUNTING CIRCUIT, INCLUDING A STORAGE CONDENSER, COUPLED TO SAID SOURCE FOR DEVELOPING ACROSS SAID CONDENSER A VOLTAGE HAVING A STAIR-STEP WAVE SHAPE WITH SUCCESSIVE STEPS INITIATED BY SUCCESSIVE ONES OF SAID PULSES; A TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES; A CHARGE CIRCUIT FOR SAID CONDENSER INCLUDING THE BASE-EMITTER CONDUCTION PATH OF SAID TRANSISTOR; MEANS FOR NORMALLY BIASING SAID TRANSISTOR TO ITS NON-CONDUCTING CONDITION TO RENDER SAID CHARGE CIRCUIT INOPERATIVE, THE BIAS BEING OVERCOME TO RENDER SAID CHARGE CIRCUIT OPERATIVE WHEN SAID STAIR-STEP WAVE SHAPE REACHES A PREDETERMINED STEP; AND A UNIDIRECTIONAL TRANSLATING DEVICE INCLUDED IN SAID CHARGE CIRCUIT TO PREVENT SAID STORAGE CONDENSER FROM VARYING ITS CHARGE, WHEN SAID TRANSISTOR IS BIASED TO ITS CUT-OFF CONDITION, DUE TO UNDESIRABLE LEAKAGE THROUGH SAID BASE-EMITTER CONDUCTION PATH.