US3101406A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic integrating circuit
Assignee: Individual
•
Filing: 1960-06-02
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Granted: 1963-08-20
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Expires: 1980-06-02
Abstract
No abstract record available.
Inventors
- 👤 Rudolph H Engelmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:00
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/18; G06G7/184
Claims Analysis
Total Claims: 1
Claim 1
Independent Claim
147 words
IN AN ELECTRONIC INTEGRATING CIRCUIT THE COMBINATION COMPRISING A TRANSISTOR HAVING A BASE, A COLLECTOR AND AN EMITTER, A CAPACITOR CONNECTED BETWEEN SAID EMITTR AND SAID COLLECTOR, MEANS FOR SELECTIVELY APPLYING A VOLTAGE PULSE TO SAID CAPACITOR TO CHARGE IT TO AN INITIAL VOLTAGE, MEANS FOR BIASING SAID BASE WITH OPERATING VOLTAGE, CURRENT DIVIDING MEANS COMPRISING A DIODE OF THE SAME SEMICONDUCTOR CRYSTALLINE MATERIAL AS SAID TRANSISTOR CONNECTED BETWEEN SAID BASE AND SAID EMITTER AND ORIENTED TO PERMIT CURRENT TO FLOW FROM SAID BASE TO SAID EMITTER, SIGNAL INPUT TERMINAL MEANS INCLUDING A FIRST TERMINAL COUPLED TO SAID BASE AND A SECOND TERMINAL COUPLED TO THE JUNCTURE BETWEEN SAID CAPACITOR AND EMITTER FOR RECEIVING A SIGNAL TO BE INTEGRATED SUBSEQUENT TO TERMINATION OF SAID VOLTAGE PULSE, WHEREBY THE CHARGE REMAINING ON SAID CAPACITOR AFTAER A GIVEN TIME INTERVAL IS INDICATIVE OF THE INTEGRAL THEREOF OF SAID SIGNAL.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1966-08-19 | 1967-02-18 | 1967-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1970-08-19 | 1971-02-18 | 1971-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1974-08-19 | 1975-02-18 | 1975-08-20 | $7700.00 | Window Closed / Lapsed |