← Back to Patent Explorer
US3098966A Expired / Lapsed US ⏱️ 0.0 years remaining

Protective circuit for transistor regulators

Assignee: Motors Liquidation Co
•
Filing: 1960-08-26
•
Granted: 1963-07-23
•
Expires: 1980-08-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Louis J Raver

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:55
CPC Classifications
H; H02; H02J; H02J7/00; H02J7/14; H02J7/16; H02J7/24; H02J7/243

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 243 words
IN A COMBINATION, AN ALTERNATING CURRENT GENERATOR HAVING A THREE PHASE OUTPUT WINDING AND A FIELD WINDING, A THREE PHASE FULL WAVE BRIDGE RECTIFIER NETWORK HAVING A PAIR OF D.C. OUTPUT TERMINALS AND A PLURALITY OF A.C. INPUT TERMINALS CONNECTED WITH SAID OUTPUT WINDING, A TRANSISTOR VOLTAGE REGULATING MEANS COMPRISING FIRST AND SECOND TRANSISTORS EACH HAVING EMITTER, COLLECTOR AND BASE ELECTRODES, SAID TRANSISTOR VOLTAGE REGULATING MEANS HAVING A POSITIVE TERMINAL, A FIELD TERMINAL AND A NEGATIVE TERMINAL, CONDUCTOR MEANS CONNECTING ONE SIDE OF SAID FIELD WINDING WITH THE FIELD TERMINAL OF SAID TRANSISTOR VOLTAGE REGULATING MEANS, CONDUCTOR MEANS CONNECTING SAID FIELD TERMINAL WITH THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR, A CIRCUIT CONNECTING SAID POSITIVE TERMINAL AND THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR INCLUDING A FIRST DIODE POLED TO CONDUCT CURRENT TOWARDS SAID EMITTER OF SAID FIRST TRANSISTOR, MEANS CONNECTING THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR WITH THE BASE ELECTRODE OF SAID FIRST TRANSISTOR, MEANS CONNECTING THE EMITTER ELECTRODE OF SAID SECOND TRANSISTOR TO A SIDE OF SAID FIRST DIODE OPPOSITE FROM ITS CONNECTION WITH THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR, A VOLTAGE DIVIDING NETWORK CONNECTED ACROSS THE POSITIVE AND NEGATIVE TERMINALS OF SAID TRANSISTOR VOLTAGE REGULATOR, A ZENER DIODE CONNECTED BETWEEN THE BASE ELECTRODE OF SAID SECOND TRANSISTOR AND SAID VOLTAGE DIVIDER NETWORK, A SECOND DIODE CONNECTED IN PARALLEL WITH SAID FIELD WINDING, AND A THIRD DIODE CONNECTED BETWEEN SAID POSITIVE AND NEGATIVE TERMINALS OF SAID TRANSISTOR VOLTAGE REGULATOR.
Claim 2
Dependent Claim 243 words
IN A COMBINATION, AN ALTERNATING CURRENT GENERATOR HAVING A THREE PHASE OUTPUT WINDING AND A FIELD WINDING, A THREE PHASE FULL WAVE BRIDGE RECTIFIER NETWORK HAVING A PAIR OF D.C. OUTPUT TERMINALS AND A PLURALITY OF A.C. INPUT TERMINALS CONNECTED WITH SAID OUTPUT WINDING, A TRANSISTOR VOLTAGE REGULATING MEANS COMPRISING FIRST AND SECOND TRANSISTORS EACH HAVING EMITTER, COLLECTOR AND BASE ELECTRODES, SAID TRANSISTOR VOLTAGE REGULATING MEANS HAVING A POSITIVE TERMINAL, A FIELD TERMINAL AND A NEGATIVE TERMINAL, CONDUCTOR MEANS CONNECTING ONE SIDE OF SAID FIELD WINDING WITH THE FIELD TERMINAL OF SAID TRANSISTOR VOLTAGE REGULATING MEANS, CONDUCTOR MEANS CONNECTING SAID FIELD TERMINAL WITH THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR, A CIRCUIT CONNECTING SAID POSITIVE TERMINAL AND THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR INCLUDING A FIRST DIODE POLED TO CONDUCT CURRENT TOWARDS SAID EMITTER OF SAID FIRST TRANSISTOR, MEANS CONNECTING THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR WITH THE BASE ELECTRODE OF SAID FIRST TRANSISTOR, MEANS CONNECTING THE EMITTER ELECTRODE OF SAID SECOND TRANSISTOR TO A SIDE OF SAID FIRST DIODE OPPOSITE FROM ITS CONNECTION WITH THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR, A VOLTAGE DIVIDING NETWORK CONNECTED ACROSS THE POSITIVE AND NEGATIVE TERMINALS OF SAID TRANSISTOR VOLTAGE REGULATOR, A ZENER DIODE CONNECTED BETWEEN THE BASE ELECTRODE OF SAID SECOND TRANSISTOR AND SAID VOLTAGE DIVIDER NETWORK, A SECOND DIODE CONNECTED IN PARALLEL WITH SAID FIELD WINDING, AND A THIRD DIODE CONNECTED BETWEEN SAID POSITIVE AND NEGATIVE TERMINALS OF SAID TRANSISTOR VOLTAGE REGULATOR.

References Cited (Backward Citations)

US2776382A Cited
US2809301A Cited
US2922945A Cited
US2967990A Cited
US2958033A Cited
US2967251A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-07-22 1967-01-21 1967-07-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-07-22 1971-01-21 1971-07-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-07-22 1975-01-21 1975-07-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag