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US3091705A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse former utilizing minority carrier storage for stretching output and delayer controlling said output duration

Assignee: Honeywell Inc
•
Filing: 1960-01-28
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Granted: 1963-05-28
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Expires: 1980-01-28
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Abstract

No abstract record available.

Inventors

  • 👤 Levine Abraham

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 07:04
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/33; H03K5/00; H03K5/01; H03K5/04; H03K5/06

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 139 words
PULSE FORMING APPARATUS OF THE CLASS DESCRIBED COMPRISING: FIRST AND SECOND SEMICONDUCTOR MEANS EACH HAVING INPUT AND OUTPUT ELECTRODES; DELAY MEANS HAVING FIRST AND SECOND TERMINALS; INPUT SIGNAL MEANS; CIRCUIT MEANS CONNECTING SAID INPUT SIGNAL MEANS TO THE INPUT ELECTRODES OF SAID FIRST SEMICONDUCTOR MEANS AND TO THE FIRST TERMINAL OF SAID DELAY MEANS; CIRCUIT MEANS CONNECTING THE SECOND TERMINAL OF SAID DELAY MEANS TO THE INPUT ELECTRODES OF SAID SECOND SEMICONDUCTOR MEANS, WHEREBY SAID SECOND SEMICONDUCTOR MEANS IS ENERGIZED AFTER SAID FIRST SEMICONDUCTOR MEANS IS ENERGIZED, AND DEENERGIZED AFTER SAID FIRST SEMICONDUCTOR MEANS IS DEENERGIZED; RESISTANCE MEANS; A SOURCE OF ENERGIZED POTENTIAL; CIRCUIT MEANS CONNECTING SAID RESISTANCE MEANS AND THE OUTPUT ELECTRODES OF SAID FIRST SEMICONDUCTOR MEANS IN SERIES RELATIONSHIP ACROSS SAID POTENTIAL SOURCE; AND MEANS CONNECTING THE OUTPUT ELECTRODES OF SAID SECOND SEMICONDUCTOR ACROSS SAID RESISTANCE MEANS.
Claim 2
Dependent Claim 139 words
PULSE FORMING APPARATUS OF THE CLASS DESCRIBED COMPRISING: FIRST AND SECOND SEMICONDUCTOR MEANS EACH HAVING INPUT AND OUTPUT ELECTRODES; DELAY MEANS HAVING FIRST AND SECOND TERMINALS; INPUT SIGNAL MEANS; CIRCUIT MEANS CONNECTING SAID INPUT SIGNAL MEANS TO THE INPUT ELECTRODES OF SAID FIRST SEMICONDUCTOR MEANS AND TO THE FIRST TERMINAL OF SAID DELAY MEANS; CIRCUIT MEANS CONNECTING THE SECOND TERMINAL OF SAID DELAY MEANS TO THE INPUT ELECTRODES OF SAID SECOND SEMICONDUCTOR MEANS, WHEREBY SAID SECOND SEMICONDUCTOR MEANS IS ENERGIZED AFTER SAID FIRST SEMICONDUCTOR MEANS IS ENERGIZED, AND DEENERGIZED AFTER SAID FIRST SEMICONDUCTOR MEANS IS DEENERGIZED; RESISTANCE MEANS; A SOURCE OF ENERGIZED POTENTIAL; CIRCUIT MEANS CONNECTING SAID RESISTANCE MEANS AND THE OUTPUT ELECTRODES OF SAID FIRST SEMICONDUCTOR MEANS IN SERIES RELATIONSHIP ACROSS SAID POTENTIAL SOURCE; AND MEANS CONNECTING THE OUTPUT ELECTRODES OF SAID SECOND SEMICONDUCTOR ACROSS SAID RESISTANCE MEANS.

References Cited (Backward Citations)

US2572849A Cited
US2636119A Cited
US2446802A Cited
US2633528A Cited
US2845548A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-05-27 1966-11-26 1967-05-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-05-27 1970-11-26 1971-05-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-05-27 1974-11-26 1975-05-28 $7700.00 Window Closed / Lapsed

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