Bistable indicator circuit

Claim 1

BISTABLE TRANSISTOR CIRCUITRY FOR AMPLIFYING INPUT SIGNALS RECEIVES BY THE CIRCUITRY, IN COMBINATION, A PAIR OF COMPLEMENTARY, NAMELY PNP AND NPN TRANSISTORS HAVING CONNECTED GROUNDED EMITTERS, A FIRST TERMINAL ENERGIZED WITH POSITIVE POTENTIAL, AN IMPEDANCE CONNECTED BETWEEN THE BASE OF THE NPN TRANSISTOR AND SAID FIRST TERMINAL, AN IMPEDANCE CONNECTED BETWEEN THE FIRST TERMINAL AND THE COLLECTOR OF THE NPN TRANSISTOR, A SECOND TERMINAL ENERGIZED WITH NEGATIVE POTENTIAL, AN IMPEDANCE CONNECTED BETWEEN THE BASE OF THE PNP TRANSISTOR AND THE SECOND TERMINAL, A LOAD UNIT CONNECTED BETWEEN THE SECOND TERMINAL AND THE COLLECTOR OF THE PNP TRANSISTOR, AN IMPEDANCE CONNECTED ACROSS THE COLLECTOR OF THE PNP TRANSISTOR AND THE BASE OF THE NPN TRANSISTOR, A SECOND IMPEDANCE AND A CAPACITOR CONNECTED IN PARALLEL WITH THE CONNECTED ACROSS THE BASE OF SAID PNP TRANSISTOR AND THE COLLECTOR OF THE NPN TRANSISTOR, AND MEANS FOR ALTERNATELY APPLYING ONE TYPE SIGNAL OR ANOTHER TYPE SIGNAL AT A SELECTED POINT ON THE IMPEDANCE CONNECTED ACROSS THE COLLECTOR OF THE PNP TRANSISTOR AND THE BASE OF THE NPN TRANSISTOR.