Interval timer using magnetic pickup probe and binary counter with reset circuit

Claim 1

A PULSE COUNTING CIRCUIT COMPRISING A PLURALITY OF COUNTING STAGES EACH INCLUDING A PAIR OF TRANSISTORS INTERCONNECTED FOR BINARY OPERATION WHEN TRIGGERED BY PULSES WHICH ARE TO BE COUNTED, AND MEANS FOR SUPPLYING BIASING POTENTIALS TO SAID TRANSISTORS INCLUDING FIRST AND SECOND LINES WITH ONE ELECTRODE OF ONE TRANSISTOR OF EACH PAIR OF TRANSISTORS BEING CONNECTED TO SAID FIRST LINE AND THE CORRESPONDING ELECTRODE OF THE OTHER TRANSISTOR OF EACH PAIR BEING CONNECTED TO THE SECOND LINE, SAID BIASING MEANS FURTHER INCLUDING MEANS FOR DELAYING THE ENERGIZATION OF SAID SECOND LINE UNTIL SAID FIRST LINE HAS BEEN ENERGIZED, SAID FIRST LINE BEING CONNECTABLE TO ONE SIDE OF A POTENTIAL SUPPLY, SAID DELAY MEANS INCLUDING A RESISTOR AND CAPACITOR CONNECTED IN SERIES BETWEEN SAID ONE SIDE AND THE OTHER SIDE OF SAID SUPPLY, AND MEANS RESPONSIVE TO THE CHARGING OF SAID CAPACITOR FOR PROVIDING A CIRCUIT CONNECTION BETWEEN SAID LINES WHEN SAID CAPACITOR HAS HAD TIME TO REACH A PREDETERMINED STATE OF CHARGE.