Ferroelectric code translator

Claim 1

A FERROELECTRIC TRANSLATING DEVICE INCLUDING AN INITIAL STAGE AND A TERMINAL STAGE OF FERROELECTRIC CRYSTAL TRANSLATORS, EACH OF SAID TRANSLATORS COMPRISING A PLURALITY OF FERROELECTRIC CONDENSERS, SAID CRYSTAL TRANSLATORS HAVING INPUT ELECTRODES AND OUTPUT ELECTRODES AND A PLURALITY OF OUTPUT CONDUCTORS INDIVIDUALLY CONNECTED TO SAID OUTPUT ELECTRODES, INVERTER AMPLIFIER MEANS CONNECTED TO THE INPUT ELECTRODES OF SAID INITIAL STAGE, AMPLIFIER MEANS COUPLING SAID OUTPUT CONDUCTORS OF SAID INITIAL STAGE TO SAID INPUT ELECTRODES OF SAID TERMINAL STAGE, SAID TERMINAL STAGE INCLUDING TWO GROUPS OF CRYSTAL TRANSLATORS, MEANS FOR SELECTIVELY CONDITIONING ONE OF SAID GROUPS TO AN OPERATIVE STATE, AND MEANS EFFECTIVE ON THE ACTIVATION OF SAID INITIAL STAGE INPUT ELECTRODE AND THE CONDITIONING OF ONE OF SAID GROUPS TO AN OPERATIVE STATE TO ENERGIZE ONLY ONE OF SAID OUTPUT CONDUCTORS FROM SAID ONE GROUP, WHEREIN SAID CRYSTAL TRANSLATORS IN SAID INITIAL STAGE COMPRISES A FERROELECTRIC TRANSLATOR COMPRISING A SLAB OF FERROELECTRIC MATERIAL, SAID INPUT ELECTRODES BEING DISPOSED ON ONE FACE OF SAID SLAB, SAID OUTPUT ELECTRODES BEING DISPOSED ON THE OPPOSITE FACE OF SAID SLAB AND POSITIONED TO INTERSECT SAID INPUT ELECTRODES IN ACCORDANCE WITH A CODE TO BE TRANSLATED, UNIT AREA CONDENSERS BEING FORMED AT THE INTERSECTION OF SAID ELECTRODES, AND A TANK ELECTRODE DISPOSED ON SAID ONE FACE OF SAID SLAB AND POSITIONED TO INTERSECT ALL OF SAID INPUT ELECTRODES TO FORM ADDITIONAL CONDENSERS, THE AREA OF EACH OF SAID ADDITIONAL CONDENSERS FORMED BETWEEN SAID TANK ELECTRODE AND A PARTICULAR OUTPUT ELECTRODE BEING ONE UNIT LESS THAN THE SUM OF THE UNITS OF AREA OF SAID CONDENSERS FORMED BETWEEN SAID INPUT ELECTRODES AND SAID PARTICULAR OUTPUT ELECTRODE, AND MEANS CONNECTING SAID TANK ELECTRODE TO A SOURCE OF REFERENCE POTENTIAL, AND WHEREIN SAID CRYSTAL TRANSLATORS IN SAID TERMINAL STAGE COMPRISE A FERROELECTRIC TRANSLATOR COMPRISING A SLAB OF FERROELECTRIC MATERIAL, AND INPUT ELECTRODES BEING DISPOSED ON ONE FACE OF SAID SLAB, SAID OUTPUT ELECTRODES BEING DISPOSED ON THE OPPOSITE FACE OF SAID SLAB AND POSITIONED TO INTERSECT IN ACCORDANCE WITH A CODE TO BE TRANSLATED, UNIT AREA CONDENSERS BEING FORMED AT THE INTERSECTION OF SAID ELECTRODES, SPACED FIRST AND SECOND COMMON ELECTRODES DISPOSED ON SAID ONE FACE AND POSITIONED TO INTERSECT ALL OF SAID OUTPUT ELECTRODES TO FORM A NUMBER OF ADDITIONAL CONDENSERS, THE SUM OF THE AREAS OF EACH OF SAID ADDITIONAL CONDENSERS FORMED BETWEEN SAID COMMON ELECTRODES AND A PARTICULAR OUTPUT ELECTRODE BEING EQUAL TO THE SUM OF THE AREAS OF SAID CONDENSERS FORMED BETWEEN SAID INPUT ELECTRODES AND SAID PARTICULAR OUTPUT ELECTRODE.