US3089036A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor protective circuit
Assignee: International Business Machines Corp
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Filing: 1958-12-29
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Granted: 1963-05-07
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Expires: 1978-12-29
Abstract
No abstract record available.
Inventors
- 👤 Edward H Sommerfield
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:55
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/22; H03K17/24; H03K17/51; H03K17/56; H03K17/60
Claims Analysis
Total Claims: 1
Claim 1
Independent Claim
143 words
A TRANSISTOR CIRCUIT COMPRISING IN COMBINATION, A FIRST TRANSISTOR HAVING COLLECTOR, BASE AND EMITTER ELECTRODES AND HAVING A PNP CONFIGURATION, A SECOND TRANSISTO HAVING COLLECTOR, BASE AND EMITTER ELECTRODES AND HAVING AN NPN CONFIGURATION, A SOURCE OF POSITIVE VOLTAGE CONNECTED TO THE BASE OF SAID PNP TRANSISTOR AND TO THE COLLECTOR OF SAID NPN TRANSISTOR, A SOURCE NEGATIVE VOLTAGE CONNECTED TO THE COLLECTOR OF SAID PNP TRANSISTOR AND TO THE EMITTER OF SAID NPN TRNSISTOR, INPUT SIGNAL MEANS CONNECTED TO THE BASE OF SAID PNP TRANSISTOR FOR SWITCHING SAME INTO A STATE OF CONDUCTION, MEANS CONNECTING THE COLLECTOR OUTPUT OF SAID PNP TRNSISTOR TO THE BASE OF SAID NPN TRANSISTOR TO SWITCH THE NPN TRANSISTOR INTO A STATE OF CONDUCTION, A MAGNETIC CORE IN CIRCUIT BETWEEN THE COLLECTOR OF SAID NPN TRANSISTOR AND SAID POSITIVE VOLTAGE, AND A DIODE CIRCUIT CONNECTING THE COL-
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1966-05-06 | 1966-11-05 | 1967-05-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1970-05-06 | 1970-11-05 | 1971-05-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1974-05-06 | 1974-11-05 | 1975-05-07 | $7700.00 | Window Closed / Lapsed |