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US3075151A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-biased transistor amplifiers having an emitter-follower stage and a subsequent voltage amplifying stage

Assignee: Individual
•
Filing: 1958-05-26
•
Granted: 1963-01-22
•
Expires: 1978-05-26
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Abstract

No abstract record available.

Inventors

  • 👤 Murray John Somerset

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 20:44
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/34

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 324 words
A TRANSISTOR AMPLIFIER COMPRISING A PAIR OF SUPPLYVOLTAGE TERMINALS FOR CONNECTION OF A SUPPLY-VOLTAGE SOURCE THEREBETWEEN, A CURRENT-AMPLIFYING EMITTER-FOLLOWER STAGE INCLUDING A FIRST TRANSISTOR, A SUBSEQUENT VOLTAGE-AMPLIFYING STAGE INCLUDING A SECOND TRANSISTOR, AND AT LEAST ONE FURTHER STAGE EACH ALSO INCLUDING A RESPECTIVE TRANSISTOR, THE SAID CURRENT-AMPLIFYING EMITTER-FOLLOWER STAGE FURTHER COMPRISING SIGNAL INPUT MEANS TO THE FIRST TRANSISTOR AND EMITTER RESISTANCE CONNECTING THE EMITTER OF THE FIRST TRANSISTOR TO ONE OF THE SAID TERMINALS, THE COLLECTOR OF THE FIRST TRANSISTOR BEING CONDUCTIVELY CONNECTED TO THE OTHER OF THE SAID TERMINALS, THE SAID SUBSEQUENT STAGE INCLUDING EMITTER RESISTANCE AND COLLECTOR RESISTANCE CONNECTING THE EMITTER AND THE COLLECTOR OF THE SECOND TRANSISTOR TO RESPECTIVE ONES OF THE SAID TWO TERMINALS, AND EACH SAID FURTHER STAGE COMPRISING EMITTER RESISTANCE CONNECTING THE EMITTER OF THE SAID RESPECTIVE TRANSISTOR TO ONE OF THE SAID TERMINALS, THE COLLECTOR OF EACH SAID RESPECTIVE TRANSISTOR BEING CONDUCTIVELY CONNECTED TO THE RESPECTIVE OTHER ONE OF THE SAID TERMINALS, AT LEAST EACH SAID FURTHER STAGE OTHER THAN THE LAST BEING AN EMITTER-FOLLOWER STAGE, WHEREIN THERE IS PROVIDED DIRECT-CURRENT CONDUCTIVE MEANS CONNECTING THE EMITTER OF THE SAID FIRST TRANSISTOR TO THE BASE OF THE SAID SECOND TRANSISTOR, AND WHEREIN THERE IS FURTHER PROVIDED, CONNECTING THE COLLECTOR OF THE SAID SECOND TRANSISTOR TO THE BASE OF THE SAID FIRST TRANSISTOR, ADDITIONAL DIRECT-CURRENT CONDUCTIVE MEANS WHICH INCLUDES IN SERIES THE BASE-EMITTER PATH OF THE SAID RESPECTIVE TRANSISTOR OF EACH SAID FURTHER STAGE BOTH THE SAID CONDUCTIVEMEANS AND THE SAID ADDITIONAL CONDUCTIVE MEANS EX CLUDING EVERY INTERELECTRODE PATH OTHER THAN TRANSISTOR BASE-EMITTER PATHS OF ANY SEMI-CONDUCTOR DEVICE, WHEREBY THE SAID ADDITIONAL CONDUCTIVE MEANS AND THE BASE-EMITTER PATH OF THE SAID FIRST TRANSISTOR AND THE SAID CONDUCTIVE MEANS IN SERIES CONSTITUTE A BASE-COLLECTOR BIAS LOOP, EXTENDING FROM THE COLLECTOR TO THE BASE OF THE SAID SECOND TRANSISTOR, THIS LOOP BEING ITSELF CONDUCTIVE FOR DIRECT CURRENT AND EXCLUDING EVERY INTERLECTRODE PATH, OTHER THAN TRANSISTOR BASE-EMITTER PATHS, OF ANY SEMI-CONDUCTOR DEVICE.
Claim 2
Dependent Claim 324 words
A TRANSISTOR AMPLIFIER COMPRISING A PAIR OF SUPPLYVOLTAGE TERMINALS FOR CONNECTION OF A SUPPLY-VOLTAGE SOURCE THEREBETWEEN, A CURRENT-AMPLIFYING EMITTER-FOLLOWER STAGE INCLUDING A FIRST TRANSISTOR, A SUBSEQUENT VOLTAGE-AMPLIFYING STAGE INCLUDING A SECOND TRANSISTOR, AND AT LEAST ONE FURTHER STAGE EACH ALSO INCLUDING A RESPECTIVE TRANSISTOR, THE SAID CURRENT-AMPLIFYING EMITTER-FOLLOWER STAGE FURTHER COMPRISING SIGNAL INPUT MEANS TO THE FIRST TRANSISTOR AND EMITTER RESISTANCE CONNECTING THE EMITTER OF THE FIRST TRANSISTOR TO ONE OF THE SAID TERMINALS, THE COLLECTOR OF THE FIRST TRANSISTOR BEING CONDUCTIVELY CONNECTED TO THE OTHER OF THE SAID TERMINALS, THE SAID SUBSEQUENT STAGE INCLUDING EMITTER RESISTANCE AND COLLECTOR RESISTANCE CONNECTING THE EMITTER AND THE COLLECTOR OF THE SECOND TRANSISTOR TO RESPECTIVE ONES OF THE SAID TWO TERMINALS, AND EACH SAID FURTHER STAGE COMPRISING EMITTER RESISTANCE CONNECTING THE EMITTER OF THE SAID RESPECTIVE TRANSISTOR TO ONE OF THE SAID TERMINALS, THE COLLECTOR OF EACH SAID RESPECTIVE TRANSISTOR BEING CONDUCTIVELY CONNECTED TO THE RESPECTIVE OTHER ONE OF THE SAID TERMINALS, AT LEAST EACH SAID FURTHER STAGE OTHER THAN THE LAST BEING AN EMITTER-FOLLOWER STAGE, WHEREIN THERE IS PROVIDED DIRECT-CURRENT CONDUCTIVE MEANS CONNECTING THE EMITTER OF THE SAID FIRST TRANSISTOR TO THE BASE OF THE SAID SECOND TRANSISTOR, AND WHEREIN THERE IS FURTHER PROVIDED, CONNECTING THE COLLECTOR OF THE SAID SECOND TRANSISTOR TO THE BASE OF THE SAID FIRST TRANSISTOR, ADDITIONAL DIRECT-CURRENT CONDUCTIVE MEANS WHICH INCLUDES IN SERIES THE BASE-EMITTER PATH OF THE SAID RESPECTIVE TRANSISTOR OF EACH SAID FURTHER STAGE BOTH THE SAID CONDUCTIVEMEANS AND THE SAID ADDITIONAL CONDUCTIVE MEANS EX CLUDING EVERY INTERELECTRODE PATH OTHER THAN TRANSISTOR BASE-EMITTER PATHS OF ANY SEMI-CONDUCTOR DEVICE, WHEREBY THE SAID ADDITIONAL CONDUCTIVE MEANS AND THE BASE-EMITTER PATH OF THE SAID FIRST TRANSISTOR AND THE SAID CONDUCTIVE MEANS IN SERIES CONSTITUTE A BASE-COLLECTOR BIAS LOOP, EXTENDING FROM THE COLLECTOR TO THE BASE OF THE SAID SECOND TRANSISTOR, THIS LOOP BEING ITSELF CONDUCTIVE FOR DIRECT CURRENT AND EXCLUDING EVERY INTERLECTRODE PATH, OTHER THAN TRANSISTOR BASE-EMITTER PATHS, OF ANY SEMI-CONDUCTOR DEVICE.

References Cited (Backward Citations)

BE526970A Cited
US2801297A Cited
US2762873A Cited
US2860195A Cited
US2761917A Cited
US2847519A Cited
US2887542A Cited
US2863957A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-01-21 1966-07-23 1967-01-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-01-21 1970-07-23 1971-01-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-01-21 1974-07-23 1975-01-22 $7700.00 Window Closed / Lapsed

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