US20140068291A1
Active / In Force
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⏱️ 5.8 years remaining
Performing Cross-Domain Thermal Control In A Processor
Assignee: Intel Corp
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Filing: 2012-08-31
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Granted: —
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Expires: 2032-08-31
Abstract
Abstract In an embodiment, a processor includes a first domain with at least one core to execute instructions and a second domain coupled to the first domain and including at least one non-core circuit. These domains can operate at independent frequencies, and a power control unit coupled to the domains may include a thermal logic to cause a reduction in a frequency of the first domain responsive to occurrence of a thermal event in the second domain. Other embodiments are described and claimed.
Inventors
- 👤 Xiuting C. Man
- 👤 Michael N. Derr
- 👤 Jay D. Schwartz
- 👤 Stephen H. Gunther
- 👤 Jeremy J. Shrall
- 👤 Shaun M. Conrad
- 👤 Avinash N. Ananthakrishan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:09
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/16; G06F1/20; G06F1/206; G06F1/3203; G06F1/3206; G06F1/3234; G06F1/324; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
85 words
1 . A processor comprising: a first domain including at least one core to execute instructions; a second domain coupled to the first domain and including at least one non-core circuit, wherein the first and second domains are configured to operate at independent frequencies; and a power control unit (PCU) coupled to the first and second domains, the PCU including a thermal logic to cause a reduction in a frequency of the first domain responsive to occurrence of a thermal event in the second domain.
Claim 2
Dependent Claim
85 words
1 . A processor comprising: a first domain including at least one core to execute instructions; a second domain coupled to the first domain and including at least one non-core circuit, wherein the first and second domains are configured to operate at independent frequencies; and a power control unit (PCU) coupled to the first and second domains, the PCU including a thermal logic to cause a reduction in a frequency of the first domain responsive to occurrence of a thermal event in the second domain.
Claim 3
Dependent Claim
34 words
2 . The processor of claim 1 , wherein the thermal logic is to cause the reduction in the first domain frequency by an amount corresponding to a frequency bin of the first domain.
Claim 4
Dependent Claim
26 words
3 . The processor of claim 2 , wherein the thermal logic is to update a value of a counter responsive to the thermal event occurrence.
Claim 5
Dependent Claim
36 words
4 . The processor of claim 3 , wherein the thermal logic is to cause the first domain frequency to be reduced by the frequency bin when the counter value is equal to a first value.
Claim 6
Dependent Claim
33 words
5 . The processor of claim 1 , wherein the thermal logic is to set a value of a temperature of the second domain to a second value responsive to the thermal event.
Claim 7
Dependent Claim
34 words
6 . The processor of claim 5 , wherein the thermal logic is to update a processor maximum temperature value to a maximum of a current processor maximum temperature value and the second value.
Claim 8
Dependent Claim
29 words
7 . The processor of claim 6 , wherein the thermal logic is to communicate the processor maximum temperature value to at least one agent external to the processor.
Claim 9
Dependent Claim
40 words
8 . The processor of claim 7 , wherein the at least one agent comprises an embedded controller, the embedded controller to cause a speed of a fan to increase responsive to the communication of the processor maximum temperature value.
Claim 10
Dependent Claim
38 words
9 . The processor of claim 1 , wherein the second domain comprises an internal memory die including a system memory formed of a random access memory (RAM), the second domain further including at least one thermal sensor.
Claim 11
Dependent Claim
35 words
10 . The processor of claim 9 , wherein the internal memory die further comprises a comparison logic to compare a temperature value received from the at least one thermal sensor to a threshold value.
Claim 12
Dependent Claim
33 words
11 . The processor of claim 10 , wherein the internal memory die is to communicate the thermal event to the first domain when the temperature value is greater than the threshold value.
Claim 13
Dependent Claim
31 words
12 . The processor of claim 1 , wherein the processor includes a storage to store a maximum domain temperature for the processor and a temperature value for the second domain.
Claim 14
Dependent Claim
111 words
13 . A system comprising: a multi-domain processor including a first die having a core domain including a plurality of cores, a graphics domain including at least one graphics engine, and a system agent domain including a power controller, and a second die having an embedded memory and coupled to the first die via a communication path to communicate an indication of a thermal event occurring on the second die, wherein the power controller is to reduce a frequency of at least one of the core domain and the graphics domain by a selected amount responsive to receipt of the thermal event indication; and a fan coupled to the multi-domain processor.
Claim 15
Dependent Claim
111 words
13 . A system comprising: a multi-domain processor including a first die having a core domain including a plurality of cores, a graphics domain including at least one graphics engine, and a system agent domain including a power controller, and a second die having an embedded memory and coupled to the first die via a communication path to communicate an indication of a thermal event occurring on the second die, wherein the power controller is to reduce a frequency of at least one of the core domain and the graphics domain by a selected amount responsive to receipt of the thermal event indication; and a fan coupled to the multi-domain processor.
Claim 16
Dependent Claim
34 words
14 . The system of claim 13 , wherein the power controller is to receive the indication from the second die via a push bus coupled between the first die and the second die.
Claim 17
Dependent Claim
51 words
15 . The system of claim 13 , wherein the power controller is to increment a value of a counter for the core domain responsive to receipt of the indication from the second die, and to reduce the core domain frequency by a bin frequency when the counter value equals N.
Claim 18
Dependent Claim
54 words
16 . The system of claim 13 , wherein the power controller is to update a processor maximum temperature value to a maximum of a current processor maximum temperature value and a maximum temperature of the second die, and communicate the processor maximum temperature value to an embedded controller coupled to the multi-domain processor.
Claim 19
Dependent Claim
27 words
17 . The system of claim 16 , wherein the embedded controller is to cause a speed of the fan to be increased responsive to the communication.
Claim 20
Dependent Claim
137 words
18 . A processor comprising: at least one core to execute instructions and corresponding to a first domain; a peripheral controller coupled to the at least one core and corresponding to a second domain, the peripheral controller to interface the at least one core to at least one peripheral device, the peripheral controller including a thermal sensor to sense a temperature of the peripheral controller and a detector to communicate a message when the peripheral controller temperature exceeds a thermal threshold; and a power controller coupled to the at least one core and the peripheral controller, wherein the power controller includes a cross-domain thermal logic to cause a change in a power state of the at least one core responsive to the message, the at least one core and the power controller configured within a single package.
Claim 21
Dependent Claim
137 words
18 . A processor comprising: at least one core to execute instructions and corresponding to a first domain; a peripheral controller coupled to the at least one core and corresponding to a second domain, the peripheral controller to interface the at least one core to at least one peripheral device, the peripheral controller including a thermal sensor to sense a temperature of the peripheral controller and a detector to communicate a message when the peripheral controller temperature exceeds a thermal threshold; and a power controller coupled to the at least one core and the peripheral controller, wherein the power controller includes a cross-domain thermal logic to cause a change in a power state of the at least one core responsive to the message, the at least one core and the power controller configured within a single package.
Claim 22
Dependent Claim
25 words
19 . The processor of claim 18 , wherein the at least one core and the peripheral controller are configured on a single semiconductor die.
Claim 23
Dependent Claim
53 words
20 . The processor of claim 18 , wherein the cross-domain thermal logic is to further update a processor maximum temperature value to a maximum of a current processor maximum temperature value and a maximum peripheral controller temperature, and communicate the processor maximum temperature value to an embedded controller coupled to the processor.
References Cited (Backward Citations)
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