US20020076902A1
Expired / Lapsed
US
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Low temperature silicon wafer bond process with bulk material bond strength
Assignee: Micron Technology Inc
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Filing: 1998-11-10
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Granted: —
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Expires: 2018-11-10
Abstract
Abstract The present invention includes a method for bonding one semiconductor surface to a second semiconductor surface. The method includes providing a first article that has a semiconductor surface and a second article that has a semiconductor surface. The semiconductor surfaces are annealed with an energy source wherein energy is confined to the semiconductor surfaces. The annealed surfaces are bonded to each other.
Inventors
- 👤 Joseph E. Geusic
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:02
CPC Classifications
H; H10; H10P; H10P10/00; H10P10/12; H10P10/128; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; H10W; H10W10/00; H10W10/10; H10W10/181
Claims Analysis
Total Claims: 46
Claim 1
Independent Claim
74 words
1 . A method for bonding one semiconductor surface to a second semiconductor surface, comprising: providing an article that has a semiconductor surface; providing a second article that has a semiconductor surface; annealing the semiconductor surfaces with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces; and contacting the semiconductor surface of the article to the second semiconductor surface of the second article to form a bond.
Claim 2
Dependent Claim
74 words
1 . A method for bonding one semiconductor surface to a second semiconductor surface, comprising: providing an article that has a semiconductor surface; providing a second article that has a semiconductor surface; annealing the semiconductor surfaces with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces; and contacting the semiconductor surface of the article to the second semiconductor surface of the second article to form a bond.
Claim 3
Dependent Claim
31 words
2 . The method of claim 1 and further including fabricating an integrated circuit on or within another surface of the article wherein the surface opposes the surface which is annealed.
Claim 4
Dependent Claim
20 words
3 . The method of claim 2 wherein fabricating the integrated circuit is performed prior to annealing the semiconductor surfaces.
Claim 5
Dependent Claim
36 words
4 . The method of claim 3 wherein the semiconductor surfaces are annealed at a temperature of at least about 600° Centigrade while the integrated circuit temperature is within 15 to 25° Centigrade of room temperature.
Claim 6
Dependent Claim
17 words
5 . The method of claim 1 wherein the semiconductor surfaces are annealed with a laser pulse.
Claim 7
Dependent Claim
21 words
6 . The method of claim 5 wherein the laser pulse is an incident optical pulse energy of approximately 243 joules.
Claim 8
Dependent Claim
18 words
7 . The method of claim 5 wherein the laser pulse is generated by a q-switched ruby laser.
Claim 9
Dependent Claim
23 words
8 . The method of claim 1 wherein annealing comprises exposing the energy source to the semiconductor surface incrementally over the semiconductor surface.
Claim 10
Dependent Claim
23 words
9 . The method of claim 1 wherein annealing comprises exposing the energy source to the entire semiconductor surface in a single exposure.
Claim 11
Dependent Claim
25 words
10 . The method of claim 1 and further including stripping any native oxide from at least one of the semiconductor surfaces prior to annealing.
Claim 12
Dependent Claim
18 words
11 . The method of claim 1 wherein the articles are subjected to a vacuum prior to annealing.
Claim 13
Dependent Claim
24 words
12 . The method of claim 11 wherein the articles are stored in an ultra clean environment prior to being subjected to a vacuum.
Claim 14
Dependent Claim
26 words
13 . The method of claim 1 and further including treating at least one of the semiconductor surfaces to render the surface hydrophobic prior to annealing.
Claim 15
Dependent Claim
22 words
14 . The method of claim 13 and further including bonding the treated surfaces to each other prior to annealing the surfaces.
Claim 16
Dependent Claim
20 words
15 . The method of claim 14 and further including transferring the bonded treated surfaces to an ultra-high vacuum chamber.
Claim 17
Dependent Claim
16 words
16 . The method of claim 15 and further including creating a vacuum within the chamber.
Claim 18
Dependent Claim
16 words
17 . The method of claim 16 and further including separating the surfaces prior to annealing.
Claim 19
Dependent Claim
15 words
18 . The method of claim 17 wherein the vacuum is approximately 3×10 −9 Torr.
Claim 20
Dependent Claim
60 words
19 . A semiconductor device comprising: a first semiconductor wafer and a second semiconductor wafer, each having an annular edge, the second wafer annealed to the first semiconductor wafer forming a bond, wherein the bond is substantially free of hydrogen or defects; and an integrated circuit element positioned on or within the annular edge of one of the semiconductor wafers.
Claim 21
Dependent Claim
60 words
19 . A semiconductor device comprising: a first semiconductor wafer and a second semiconductor wafer, each having an annular edge, the second wafer annealed to the first semiconductor wafer forming a bond, wherein the bond is substantially free of hydrogen or defects; and an integrated circuit element positioned on or within the annular edge of one of the semiconductor wafers.
Claim 22
Dependent Claim
19 words
20 . The semiconductor device of claim 19 wherein the semiconductor wafers have a diameter of about 4 inches.
Claim 23
Dependent Claim
17 words
21 . The semiconductor device of claim 20 wherein the integrated circuit element is comprised of aluminum.
Claim 24
Dependent Claim
16 words
22 . The semiconductor device of claim 21 wherein the semiconductor devices are comprised of silicon.
Claim 25
Dependent Claim
65 words
23 . A semiconductor device comprising: a first silicon wafer and a second silicon wafer bonded to the first silicon wafer; and a circuit element positioned on or within the second silicon wafer that includes features which change when subjected to a temperature at which the first silicon wafer is bonded to the second wafer, wherein the features are free of any bonding temperature changes.
Claim 26
Dependent Claim
65 words
23 . A semiconductor device comprising: a first silicon wafer and a second silicon wafer bonded to the first silicon wafer; and a circuit element positioned on or within the second silicon wafer that includes features which change when subjected to a temperature at which the first silicon wafer is bonded to the second wafer, wherein the features are free of any bonding temperature changes.
Claim 27
Dependent Claim
24 words
24 . The semiconductor of claim 23 wherein each of the bonded wafers has a surface that is available for use over its entirety.
Claim 28
Dependent Claim
19 words
25 . The semiconductor of claim 24 wherein the element comprises one or more of aluminum, copper, or polysilicon.
Claim 29
Dependent Claim
75 words
26 . A method for bonding one semiconductor wafer to another semiconductor wafer in order to maximize area and volume of a bonded wafer, comprising: providing first and second semiconductor wafers; annealing surfaces of the semiconductor wafers with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces and energy is sequentially applied to a fraction of each of the surfaces; and bonding the annealed surfaces to each other.
Claim 30
Dependent Claim
75 words
26 . A method for bonding one semiconductor wafer to another semiconductor wafer in order to maximize area and volume of a bonded wafer, comprising: providing first and second semiconductor wafers; annealing surfaces of the semiconductor wafers with an energy source wherein energy from the energy source is substantially confined to the semiconductor surfaces and energy is sequentially applied to a fraction of each of the surfaces; and bonding the annealed surfaces to each other.
Claim 31
Dependent Claim
13 words
27 . The method of claim 26 wherein the energy source is pulsed.
Claim 32
Dependent Claim
28 words
28 . The method of claim 26 wherein the energy is sequentially applied so that a sum of the fractions comprises substantially an entire surface of the wafer.
Claim 33
Dependent Claim
25 words
29 . The method of claim 26 wherein the energy is applied as a fraction of energy as is applied to an entire wafer surface.
Claim 34
Dependent Claim
24 words
30 . The method of claim 26 wherein each fraction to which energy is applied is approximately one-tenth of the surface of the wafer.
Claim 35
Dependent Claim
17 words
31 . The method of claim 26 and further including mounting the silicon wafers on a stage.
Claim 36
Dependent Claim
25 words
32 . The method of claim 31 wherein the stage is moveable in an x-axis and a y-axis in relation to a fixed energy source.
Claim 37
Dependent Claim
18 words
33 . The method of claim 31 wherein the stage is fixed and the energy source is moveable.
Claim 38
Dependent Claim
29 words
34 . The method of claim 33 and further including focusing energy from the energy source to impinge in a raster x and y movement across the wafer surface.
Claim 39
Dependent Claim
27 words
35 . A semiconductor article comprising a p-type silicon wafer and an n-type silicon wafer wherein the p-type silicon wafer is bonded to the n-type silicon wafer.
Claim 40
Dependent Claim
27 words
35 . A semiconductor article comprising a p-type silicon wafer and an n-type silicon wafer wherein the p-type silicon wafer is bonded to the n-type silicon wafer.
Claim 41
Dependent Claim
22 words
36 . The semiconductor article of claim 35 wherein the p-type wafer and the n-type wafer have substantially the same crystallographic structure.
Claim 42
Dependent Claim
25 words
37 . The semiconductor article of claim 35 wherein the orientations of the p-type wafer and the n-type wafer are aligned within approximately one degree.
Claim 43
Dependent Claim
14 words
38 . The semiconductor article of claim 35 and further including a P-N junction.
Claim 44
Dependent Claim
37 words
39 . A semiconductor article comprising an epitaxial layer, an insulator layer underlying the epitaxial layer, a silicon layer underlying the insulator layer wherein the silicon layer comprises one silicon wafer bonded to a second silicon wafer.
Claim 45
Dependent Claim
37 words
39 . A semiconductor article comprising an epitaxial layer, an insulator layer underlying the epitaxial layer, a silicon layer underlying the insulator layer wherein the silicon layer comprises one silicon wafer bonded to a second silicon wafer.
Claim 46
Dependent Claim
22 words
40 . The semiconductor article of claim 39 and further including a high voltage device or CMOS etched within the epitaxial layer.
References Cited (Backward Citations)
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