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JPS6489779A Expired / Lapsed JP ⏱️ 0.0 years remaining

Time base correcting circuit

Assignee: Toshiba Corp
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Filing: 1987-09-30
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Granted: —
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Expires: 2007-09-30
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Abstract

Abstract PURPOSE:To ensure a time base correction by providing a first memory means to record digitized video signal at every portion of plural scanning lines and a second memory means to record the video signal of the plural scanning lines corrected with a correcting means in a video tape recorder, etc. CONSTITUTION:A first buffer memory 24 is connected to a first buffer memory control circuit 25, and records the video signal at every portion of the plural scanning lines (plural frames portion). A correlation computing element 27 performs the correlation operation of the video signal of the plural scanning lines, detects the position deviation of the video signal, and outputs the detected value to a position deviation correcting circuit 28. A clock generator 33 generates a clock according to the synchronization timing of a synchronization generating circuit 34, and a D/A converter 30 analog-converts the video signal outputted from a second buffer memory 29 in response to the clock. Further, a synchronization signal from a synchronization generating circuit 34 is added to the video signal by an analog adder 31, and the video signal is guided to an output terminal as the output video signal.

Inventors

  • 👤 Seiji Kuniyasu

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 19:44
CPC Classifications
—

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