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JPS648591A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory ic

Assignee: NEC Corp
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Filing: 1987-06-30
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Granted: —
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Expires: 2007-06-30
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Abstract

Abstract PURPOSE:To compactly mount the titled IC by combining a ROM and a RAM on the same chip and integrating the circuits. CONSTITUTION:An address line data line and control line are used in common by combining and integrating the read only memory (ROM) 5, a read/write memory (RAM) 4 and two circuits (memory) on the chip. An address enters as address input buffer 1, and an X decoder 2 and a Y decoder 3 access the RAM memory cell 4 and the ROM memory cell 5 and accessed data is outputted or inputted to and from a data input/output terminal through the input/output buffer 6. Moreover, a control signal for memory read or write from a host is controlled by a control circuit 7. Thus, compact mounting is attained.

Inventors

  • 👤 Akira Nakajima

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 05:33
CPC Classifications
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