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JPS6480168A Expired / Lapsed JP ⏱️ 0.0 years remaining

Picture magnifying/reducing method and device therefor

Assignee: Panasonic Holdings Corp
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Filing: 1987-09-22
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Granted: —
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Expires: 2007-09-22
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Abstract

Abstract PURPOSE:To contrive the simplification of a circuit by providing a 1st RAM rewriting easily an optional function for interpolating picture elements externally and a 2nd RAM storing the read address of the interpolation data in response to the magnification/reduction rate and rewriting the data optionally. CONSTITUTION:In giving a series of picture data, picture elements g1 g2 3 representing themselves are inputted to an input line 101 in case of linear interpolation and picture elements g2 g3 g4 in the vicinity are inputted synchronously to an input line 102 and a picture data (h) subjected to magnification interpolation is outputted line 103. At first, a read address (i) of an interpolation data is set from a microcomputer or the like via a data input line 105 to the RAM 104. Interpolation increment data [0, -45, 3, 6, 13] are read one after another corresponding to data of i=0, 2, 1, 3, 2 in the read picture interpolation data and inputted to an adder 110.

Inventors

  • 👤 Yoshimitsu Sugano
  • 👤 Teruo Fumoto
  • 👤 Hiroaki Kodera

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 22:50
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/40; G06T3/4007

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5679571A Cited
JPS62169278A Cited
JPS62252268A Cited

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