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JPS6480137A Expired / Lapsed JP ⏱️ 0.0 years remaining

Sampling frequency conversion circuit

Assignee: Sony Corp
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Filing: 1987-09-21
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Granted: —
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Expires: 2007-09-21
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Abstract

Abstract PURPOSE:To prevent an error caused by a change point of a data sampled by outputting selectively a data string sampled while the data is ensured among plural strings sampled by the clock of a sampling frequency. CONSTITUTION:A data string varied synchronously with the leading of a sampling clock f1 and a data string varied synchronously with the trailing of the sampling clock f1 and delayed by a half period from the former data string are generated respectively from the output of a FF 5 and the output of a FF 6. The data string is fed from the FFs 5, 6 to the FFs 7, 8 and sampled at the leading of a sampling clock f3. Then the data string sampled while the data is ensured among the data strings is selected by a switch circuit 9 and outputted. Thus, the sampling data when the data is ensured is extracted at all times and an error caused by sampling the vicinity of the change point of data is prevented.

Inventors

  • 👤 Etsuro Sakamoto
  • 👤 Takao Takahashi
  • 👤 Koji Iijima
  • 👤 Katsuhiko Ueno

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-10 02:03
CPC Classifications
—

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