Semiconductor integrated circuit device

Abstract

Abstract PURPOSE:To reduce the occupation area of an annexed element as well as to enhance the degree of integration of the entire integrated circuit device by a method wherein, using the same electrode layer constituting the second semiconductor element, the other accessory element is formed on the first semiconductor device. CONSTITUTION:The memory cell M composed of a memory cell selecting MISFET Qs and an information storing capacitor Cs, and the complementary type MISFET Qn and Qp constituting the circumferential circuit of said memory cell M are provided on the same semiconductor substrate 1. A boosting capacitor CWB is provided on the upper part of the MISFET Qn and Qp. The boosting capacitor CWB is formed on the same layer as the first electrode layer 13 and the dielectric film 14 and the second electrode layer 15 of the stack structure capacitor Cs of the memory cell M. As the occupation area of the boosting capacitor can be reduced utilizing the occupation area of the MISFET Qn and Qp as above-mentioned, the degree of integration of the integrated circuit device having a DRAM can be improved.

Inventors

• 👤 Hiroyuki Miyazawa
• 👤 Shinji Shimizu

Bibliographic Details