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JPS6480060A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Hitachi Ltd
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Filing: 1987-09-19
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Granted: —
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Expires: 2007-09-19
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Abstract

Abstract PURPOSE:To contrive accomplishment of both improvement in dielectric withstand voltage and reduction in number of defects of a dielectric film by a method wherein, in a stacked structure DRAM, the dielectric film of a capacitor element is formed with a silicon nitride film and the silicon oxide film formed on the surface of said nitride film by high pressure oxidization. CONSTITUTION:The first electrode layer 13 of the capacitor C, to be used for retension of information, is connected to one electrode 13A of an MOSFET Qs to be used for selection of a memory cell. A silicon nitride film 14A is deposited on the surface of the n-type polysilicon electrode layer 13 using a CVD method, and a part of the nitride film 14A is formed into an oxide film 14B using a high-pressure oxidizing method. The second electrode layer 15, consisting of n-type polysilicon, is laminated on the film 14B. As the nitride film 14A is adopted as a dielectric film 14, the defect on the film is few, and a leak current is reduced. As the oxide film 14B is formed on the film 14A, the leak current is reduced all the more.

Inventors

  • 👤 Hiroko Kaneko
  • 👤 Masami Ozawa
  • 👤 Atsushi Hiraiwa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 16:50
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31

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