Emitter-coupled logic circuit

Abstract

Abstract PURPOSE:To accelerate an operation by providing a fourth NPN transistor which discharges electric charge accumulated in the load capacitor of an output terminal. CONSTITUTION:By turning ON first NPN transistors Q1 and Q2, third PNP transistors Q6 and Q7 are turned ON simultaneously, thereby, the fourth NPN transistors Q8 and Q9 are turned ON. Simultaneously with the turning ON of the fourth NPN transistors Q8 and Q9, second NPN transistors Q4 and Q5 are turned OFF. Thereby, the electric charge accumulated in the load capacitors C1 and C2 of the output terminals 13 and 14 are discharged by the fourth NPN transistors Q8 and Q9, and the levels of the output terminals 13 and 14 drops quickly. In such a way, it is possible to accelerate a circuit operation.

Inventors

• 👤 Hitoshi Omichi

Bibliographic Details