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JPS6477155A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Fuji Electric Co Ltd
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Filing: 1987-09-18
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Granted: —
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Expires: 2007-09-18
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Abstract

Abstract PURPOSE:To make a substrate low in potential to prevent a parasitic current from flowing by a method wherein a junction isolated P-type substrate is insulated from a ground potential and made to be connected with a power source whose potential is lower than that of the substrate through a terminal. CONSTITUTION:A pixel 10 is connected with an X output terminal 15 and a Y output terminal 25 of an X electrode drive integrated circuit 1 and a Y electrode drive integrated circuit 2 respectively which control the charge and discharge of the pixel 10. Both the output terminals 15 and 25 are connected with high voltage power source terminals 18 and 28 through the intermediary of H power transistors 11 and 21 which control the charge of a load condenser, and connected with ground terminals 19 and 29 through the intermediary of L power transistors 12 and 22. A voltage variable direct current power source 9 is made to be connected with a terminal 8 connected with a substrate of an integrated circuit 1 and the ground terminals 19 and 29 as a negative power source. The potential of the substrate is made to be lowest in a system through the negative power source 9 so as not to cause damage to an electric equipment system due to a parasitic diode, parasitic capacitance, or the like which are ievitably consituted between the substrate and the integrated devices.

Inventors

  • 👤 Hisao Takeda
  • 👤 Naoto Fujishima

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 18:08
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS55158647A Cited

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