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JPS6476771A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of vertical field-effect transistor

Assignee: NEC Corp
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Filing: 1987-09-18
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Granted: —
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Expires: 2007-09-18
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Abstract

Abstract PURPOSE:To make the contact of a back gate part reliable, and make it possible to prevent the generation of failures, by a method wherein a base layer and a source layer are formed by forming a mask in the aperture part of an insulating film formed on a semicoductor substrate, and on said mask, a conducting film constituting the back gate part is formed. CONSTITUTION:On a silicon substrate 1, are formed a well layer 2 and a silicon oxide film 3, which is selectively eliminated on the layer 2 by etching, and the contact hole 10 of a back gate part is formed. Polycrystalline silicon layer is formed, which is subjected to patterning, and gate electrodes 4a, 4b are formed. By using the mask 4b, impurity having the same conductivity type as the layer 2 is introduced in the silicon substrate 1, and a base layer 5 is formed. Impurity having the different conductivity type is introduced in the layer 5, and a source layer 6 is formed. By selectively etching an interlayer film 7 coating the whole surface, a contact hole 11 is formed on the back gate part. Via the mask 4b being conductor, the layers 6, 5 are connected to aluminum 8, and a process to eliminate mask material is unnecessitated.

Inventors

  • 👤 Takatoshi Fujimoto

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 08:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62

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