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JPS6468965A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: NEC Corp
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Filing: 1987-09-09
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Granted: —
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Expires: 2007-09-09
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Abstract

Abstract PURPOSE:To make it possible to microscopically form each element without being influenced by the limit of lithographic technique and to prevent contact resistance from becoming too large by a method wherein a diffusion region, which becomes a source and drain, is provided on the side face of a groove. CONSTITUTION:A thin oxide film 3 is formed on a single crystal silicon substrate 1. Then, a diffusion layer, which becomes a source and drain region 2, is selectively formed. Subsequently, a single crystal silicon film 5, which becomes a gate electrode, is formed and the impurities such as phosphorus and the like are diffused. A polycrystalline silicon film 5, an oxide film 3 and a single crystal silicon substrate 1 are selectively etched. At this point, a groove is formed on the single crystal silicon substrate 1. Then, the inside of the groove and the polycrystalline silicon film 5 are oxidized, and an oxide film 7, a nitride film 8 and a CVD oxide film 9 are formed. Subsequently, an insulating material 10 is filled up therein. The insulating material 10, and the CVD oxide film 9 are etched using a photoresist film 11 as a mask, and they are left in a columnar shape in the groove. Then, a silicon thin film 30 and an aluminum electrode 15 to be used for wiring are formed.

Inventors

  • 👤 Yumi Fukuda

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 09:21
CPC Classifications
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