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JPS6465876A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1987-09-07
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Granted: —
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Expires: 2007-09-07
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Abstract

Abstract PURPOSE:To manufacture a MES-FET easily which is provided with a gate small in length by a method wherein a first insulating layer is subjected to etching through an opening of a resist layer, and a second insulating layer is formed on the exposed face. CONSTITUTION:An opening 5 is provided to a resist layer 3 laminated on a SiO2 layer 2 of a first insulating layer on a GaAs substrate 1, and the layer 2 is removed by etching using the layer 3 as a mask. Next, a SiO2 layer 6 of a second insulating layer is formed on the exposed face, the layer 6 is removed through a dry etching performed from the top, and then a metal layer 7 of Ti-Pt-Au is evaporated. Then, the unremoved part of the layer 6 is removed through a wet etching and the layer 7 on the layer 3 is removed through a lift-off, so that a gate electrode 7a corresponding to the size of the opening 5 is formed, and thus a MES-FET with a gate small in length can be easily manufactured.

Inventors

  • 👤 Takehiro Takayama

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 12:02
CPC Classifications
—

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