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JPS6465628A Expired / Lapsed JP ⏱️ 0.0 years remaining

Digital operation deciding circuit

Assignee: Toshiba Corp
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Filing: 1987-09-07
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Granted: —
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Expires: 2007-09-07
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Abstract

Abstract PURPOSE:To allow a small sized circuit to execute excellent decision even when there are many bits in the data by providing the titled circuit with the 1st and 2nd deciding means and an arithmetic means for calculating an absolute value to decide a prescribed condition and to execute required decision. CONSTITUTION:A digital operation formula is substituted for ¦A - B¦<2N. Data alpha, beta of respective lower N bits in the data A, B are compared at their size by a size comparator 15. On the other hand, data (a), (b) of upper bits excluding the lower N bits in the data A, B are compared at their size by a size comparator 18. The data (b) are converted into a negative value, a - b is calculated by a full adder 21, and when the absolute value is '1', outputs an 'H' level signal. In the other case, an 'L' level signal is outputted. The level outputs of each decision result are supplied to an OR circuit 24 through AND circuits 16, 17 and 19, 20. The outputs goes to a 'H' level, only when a=b, ¦a-b¦, and alpha<beta, ¦a-b¦=1 and a<alpha, alpha>beta. Then, whether or not the formu la is satisfied, is decided.

Inventors

  • 👤 Toshihiko Kaneshige

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 00:47
CPC Classifications
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