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JPS6460132A Expired / Lapsed JP ⏱️ 0.0 years remaining

Duo-binary signal demodulating circuit

Assignee: Yokogawa Electric Corp
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Filing: 1987-08-31
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Granted: —
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Expires: 2007-08-31
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Abstract

Abstract PURPOSE:To output an optimum sampling time by supplying a signal for a correction so as to cancel an error voltage generated in a charge pump according to the transition condition of an element timing clock. CONSTITUTION:A charge correcting circuit 19 is provided which outputs correcting signals 213 and 214 to instruct a charge and a discharge to a charge pump 107 when a phase deciding device 106 deviates, in depending on a signal pattern, from an ideal charge pump control in which an element timing clock 206 and the optimum sampling time coincide at the time of inputting the output signal of a level deciding device 104 and the element timing clock 206. Thus, a duo-binary signal demodulating circuit can be obtained in which a sampling clock can be maintained in the optimum sampling time without depending on the transmitting signal pattern.

Inventors

  • 👤 Yasuhiko Shioe

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 00:16
CPC Classifications
—

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