Manufacture of fet gate

Abstract

Abstract PURPOSE:To sufficiently reduce resistance of a polycrystalline silicon for a gate and obtain a field effect transistor having uniform characteristics, by growing doped polycrystalline silicon on undoped polycrystalline silicon and forming low resistant polycrystalline silicon by heat treatment in which two- layer polycrystalline silicon is integrated. CONSTITUTION:A p-type layer 3 is diffused in an n-type layer 2, a gate insulating film 4 is formed thereon and then, an undoped polycrystalline silicon layer 5a and a doped polycrystalline silicon layer 5b are sequentially grown. The polycrystalline silicon layers 5a and 5b are dug to leave only a gate section using a photoresist film 6 as a mask. Then, Boron 8a as impurities for a p-type channel layer 8 and arsenic 9a as impurities for an n-type source layer 9 are sequentially implanted on a substrate surface using the polycrystalline silicon layers 5a and 5b and a photoresist layer 7 as a mask. Two kinds of impurities introduced in the substrate surface are double-diffused at the same time in a heat diffusion process. On the other hand, on a gate side, the impurities in the doped polycrystalline silicon layer 5b are diffused in the polycrystalline silicon layer 5a in this thermal diffusion process to become a gate 5 comprising low resistant polycrystalline silicon.

Inventors

• 👤 Naoki Kumagai

Bibliographic Details