Microprocessor

Abstract

Abstract PURPOSE:To realize the high-speed processing with a microprocessor by replacing the contents of an address register with the address to be read out next while a cache memory is read out and starting a new reading action concurrently with output of data. CONSTITUTION:A cache reference program counter 4 is increased by a program counter control mechanism 5 during the reading actions is carried out in phases A and B and regardless of a hit or non-hit state of a cache memory M. The count value of the counter 4 is outputted to a cache address bus 3 before the next phase A. In the next phase A the reading result of a RAM 19, i.e., the reading result of the memory M is latched by a data latch 21. At the same time, a new cache access is started. Thus the next reading action is immediately started in the second phase A as long as the data are valid. As a result, the processing speed is increased at the reference to a cache.

Inventors

• 👤 Tatsuya Ueda

Bibliographic Details