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JPS6436331A Expired / Lapsed JP ⏱️ 0.0 years remaining

Arithmetic processing circuit

Assignee: Sony Corp
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Filing: 1987-07-31
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Granted: —
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Expires: 2007-07-31
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Abstract

Abstract PURPOSE:To obtain output data with a power value with high accuracy and at high speed, by converting input data to data of floating point format, and converting mantissa part data to the output data with the power value by performing bit shift so that the value of character part data can be set at the added value of the common multiple of the value of the denominator of a character and a prescribed value. CONSTITUTION:By converting the input data DZ to the mantissa part data DM and the character part data DE of floating point formats and obtaining the mantissa part data DT with the power value by using a ROM table circuit 8, it is possible to simplify the constitution of the ROM table circuit 8 by that share. At this time, the bit shift of the mantissa part data DE is performed by a bit shift circuit 7 so that the value of the character part data DM can be set at the added value 2n of the common multiple 2n and a prescribed integer value for the value 2 of the denominator of the character with the power value. And it is possible to obtain the output data DK with the power value by a reverse conversion circuit 9 by performing the bit shift by a prescribed quantity of the mantissa part data DT obtained via the ROM table circuit 8. In such a way, it is possible to execute the arithmetic processing of a power with simple constitution and high accuracy, and at high speed as a whole.

Inventors

  • 👤 Yoshitaka Kurauchi
  • 👤 Masaaki Oka

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 20:27
CPC Classifications
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