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JPS6428931A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: NEC Corp
•
Filing: 1987-07-24
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Granted: —
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Expires: 2007-07-24
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Abstract

Abstract PURPOSE:To suppress a fatigue breakdown by a method wherein a shape of a high-melting-point solder bump installed on a semiconductor chip is kept as it is, a low-melting-point solder bump mainly installed on a wiring part of a circuit board is melted and the semiconductor chip is connected electrically to the wiring part of the circuit board. CONSTITUTION:A high-melting-point solder layer composed of 90% of Pb and 10% of Sn is formed on a barrier metal 2 installed on a semiconductor chip 1 by a plating method or the like; this layer is shaped by a wet back method; a nearly spherical solder bump 3 is formed. On the other hand, another barrier metal 2 is installed in a position corresponding to the high-melting-point solder bump 3 on a wiring part 5 installed on a circuit board 4 to mount the semiconductor chip 1; a hill-shaped low-melting-point solder bump 6 composed of 40% of Pb and 60% of Sn is formed on the barrier metal 2 by the plating method. The solder bump 6 is superposed on the high-melting-point solder bump 3; these reflow at 200-230 deg.C; the semiconductor chip 1 is connected electrically to the wiring part 5. During this process, the high-melting.point solder bump 3 keeps its shape as it is and is bonded to the molten low-melting-point solder bump 6.

Inventors

  • 👤 Yoshifumi Moriyama

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 06:47
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/072; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H10W72/07231; H10W72/07236

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5773947A Cited

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