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JPS642367A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Fuji Electric Co Ltd
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Filing: 1987-06-25
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Granted: —
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Expires: 2007-06-25
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Abstract

Abstract PURPOSE:To form the structure of a MOSFET using the other wiring as a gate, to shape a high resistance load element capable of controlling the potential of the other wiring in one wiring and to improve the degree of integration by forming one of the wirings crossing through an insulating film by a semiconductor and shaping a crossing region in the wirings in low impurity concentration in a conductivity type different from that of other regions. CONSTITUTION:A first layer wiring 1 extending in the vertical direction in a semiconductor integrated circuit and a second layer wiring 2 extending in the parallel direction are formed by polycrystalline silicon, and laminated onto a field oxide film 3 on a semiconductor substrate 1 through an inter-layer thermal oxide film 4. The wiring 1 is buried into a CVD oxide film 5, only a crossing region 21 in which the wiring 2 crosses is shaped in n-type polycrystalline silicon in low impurity concentration, and p-n junctions are formed with p-type other regions 22 having high impurity concentration and low resistance. When the oxide film 3 is thinned, the resistance of the n<-> region 21 in the wiring 2 is changed by the potential fluctuation of the wiring 1, thus increasing the density of integration of the integrated circuit and lowering power consumption thereof.

Inventors

  • 👤 Yasuo Sato

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 20:24
CPC Classifications
H; H10; H10B; H10B10/00

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS58215064A Cited
JPS612357A Cited

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