Read-only semiconductor memory

Abstract

Abstract PURPOSE:To improve reading speed and to improve an operation margin, by disposing the contact part of a bit line and the contact part of a selective earth line by dislocating at least only by the length of the transistor of a NAND bundle in the direction of a column. CONSTITUTION:Plural transistors T1-Tn for a memory cell and a NAND bundle selecting transistor TS column are serially connected to the respective columns of a memory cell array in which a MOS transistor is used as the memory cell. Only the transistor TS column including the selected memory cell is connected between the bit line BL and the selective earth line EL to read the data of the selected memory cell. The respective contact parts 2 in the bit line BL and the selecting earth line EL are dislocated with a prescribed distance in the column direction, a pitch interval between the line BL and the line EL is reduced, thereby, the size of the cell can be reduced. At the time of reading the data, a cell current is increased, a reading operation is executed at high speed and the operation margin can be improved.

Inventors

• 👤 Makoto Takizawa

Bibliographic Details