← Back to Patent Explorer
JPS6417431A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor integrated circuit device

Assignee: NEC Corp
•
Filing: 1987-07-13
•
Granted: —
•
Expires: 2007-07-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To make precise control of etching needless to obtain a flat interlayer film, by forming a resist selectively on recessed parts of a surface of the interlayer film and by etching only mounted parts uncovered with the resist on the surface of the interlayer film. CONSTITUTION:An interlayer oxide film 23 is formed on a pattern 22 of polysilicon, and the oxide film 23 is coated thick with a resist 24. Patterning of the resist 24 is performed in an inverted one to the pattern 22 by an exposure and developing method. An oxide film 23's region uncovered with a resist pattern 25 is provided with etching. An O2 gas 27 is used to peel the pattern 25 and so only mounted part is shaven from the oxide film 23. Next the oxide film 23 is provided with heat treatment, so that the flat and smooth oxide film 23 can be obtained.

Inventors

  • 👤 Hitoshi Shiraishi

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 12:13
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag