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JPS6414968A Expired / Lapsed JP ⏱️ 0.0 years remaining

Formation of gate electrode

Assignee: NEC Corp
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Filing: 1987-07-08
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Granted: —
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Expires: 2007-07-08
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Abstract

Abstract PURPOSE:To improve the breakdown strength of the device as well as to improve its reliability by a method wherein an amorphous silicon layer and a polycrystalline silicon layer are laminated successively on the surface of a gate insulating film, and the gate electrode having a smooth surface is obtained by conducting selective etching on said two silicon layers. CONSTITUTION:A gate insulating film 3 is formed by selectively providing a field insulating film 2 on the surface of a one-conductive type silicon substrate 1. Then, an amorphous silicon layer 4, containing oxygen of 1-20 atomic % is formed on the gate insulating film 3 by conducting a thermal decomposition method at the pressure of 0.5Torr and at the temperature of 600 deg.C using the mixture of silane gas and nitrous oxide gas. Then, a polycrystalline silicon layer 5 of 0.5mum in thickness is deposited on the layer 4 by conducting a silane gas thermal decomposition method at the pressure of 0.5Torr and at the temperature of 640 deg.C without exposing the surface of the amorphous silicon layer 4. A gate electrode is formed on the above-mentioned element formation region by conducting selective etching sucessively on the polycrystalline silicon layers 5 and the amorphous silicon layer 4.

Inventors

  • 👤 Kichiji Ogawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 10:54
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS63255972A Cited

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