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JPS641472A Expired / Lapsed JP ⏱️ 0.0 years remaining

Booster circuit

Assignee: Seiko Epson Corp
•
Filing: 1987-06-22
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Granted: —
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Expires: 2007-06-22
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Abstract

Abstract PURPOSE: To obtain a plurality of boosted voltages, by varying the number of boosting stages in a booster circuit. CONSTITUTION: A charge pump type booster circuit is constituted with N-channel transistor(Tr) N o -N n and capacitors C 1 ∼C n , and when drain voltage of Tr is boosted through clock signals ϕ 1 , ϕ 1 ' and a capacitor C, charges are transferred sequentially to next stage Tr to produce a higher voltage than a source voltage VDD at the output end. NAND gates 1, 2 and inverters 3, 4 are provided, and control signals are fed respectively to NAND gates 1, 2. Since the outputs from the inverters 3, 4 are fixed at L when the control signal is L, boosting operation of TrN n-1 , N n is not carried out and a voltage lower than the output voltage to be produced when the control signal is H by the threshold voltage of TrN n-1 , N n is outputted thus providing a plurality of boosted voltages. COPYRIGHT: (C)1989,JPO&Japio

Inventors

  • 👤 Akira Maruyama

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 10:25
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07; H02M3/073

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