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JPS6410355A Expired / Lapsed JP ⏱️ 0.0 years remaining

Video memory device

Assignee: Sumitomo Electric Industries Ltd
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Filing: 1987-07-03
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Granted: —
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Expires: 2007-07-03
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Abstract

Abstract PURPOSE:To shorten the processing time in processing only a part of area of a screen by setting individually the content of address conversion from a host CPU as a data of a host CPU. CONSTITUTION:Gates 16, 24 are closed, a gate 26 is opened and an m-bit address signal is outputted to an address bus 10 from the host CPU and an n-bit address value is outputted to a data bus 14 and an n-bit address is written in an address conversion circuit 20 by using an m-bit address signal. The address conversion circuit 20 stores the accessing address to a picture memory to an area of the m-bit address as the n-bit data. In accessing the picture memory for the host CPU, the gates 16, 24 are closed and a gate 24 is opened. When the host CPU makes access to the address conversion circuit 20 by the m-bit consecutive address, the n-bit picture data to be stored is outputted to a line 10A of the picture memory.

Inventors

  • 👤 Kazuto Nishiyama

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 22:46
CPC Classifications
—

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS58201159A Cited
JPS5963097A Cited

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