Address generation circuit for dma controller in image editing device

Abstract

Abstract PURPOSE:To set the addresses of a transfer origin and a transfer destination simultaneously, and to perform fast memory transfer, by finding each address of the transfer destination by adding/subtracting the displacement quantity of the address of the transfer destination on each address of the transfer origin. CONSTITUTION:Prior to transfer, the forefront address S of the memory 21 of the transfer origin is set at an address register 5, and the displacement quanti ties (offset) of the addresses of the transfer origin and the transfer destination at an address offset register 8, and based on the value of the offset, an operation of (B+A) is set when the offset is a positive value, and an operation of (B-A) when it is a negative value, at an ALU9. Also, the number of horizontal words H of a rectangular area T, and the value of a vertical line V are set at a word counter and a line counter in a control part. The word counter instructs movement to the next line at a time when a required number of data is trans ferred, and the line counter instructs the completion of the operation when the required number of lines is transferred. When the above setting are complet ed, the transfer is started.

Inventors

• 👤 Junichi Osumi
• 👤 大住　淳一

Bibliographic Details