Memory device

Abstract

Abstract PURPOSE:To speed up the processing speed by rotationally shifting an N-bit data from a memory element then outputting is based on a bit address in case of reading a data, and in case of writing the data, rotationally shifting an N-bit data and inputting it to the memory element. CONSTITUTION:A selection means (for instance a decoder circuit 3) selects N-pieces of memory element from among the memory elements (2N-pieces) of first and second memories 1, 2 based on address information such as the one bit in low order of a word address, and a bit address. In case of reading the data, a first shifting circuit 5 rotationally shifts the N-bit data from the N-pieces of memory elements selected by a selection means 3, based on the bit address in the address information, then outputs the result. In case of writing the data, a second shifting circuit 6 rotationally shifts an input N-bit data based on the bit address then inputs the data to a memory element selected by the selection means 3. In such a way, N-pieces of bits leading by an arbitrary bit can be all at once accessed, hence the processing speed can be improved.

Inventors

• 👤 Takeshi Haneshika
• 👤 羽鹿　健

Bibliographic Details