Lateral p-n-p transistor

Abstract

Abstract PURPOSE:To obtain the lateral P-N-P transistor having small irregularity in hFE and stabilized characteristics by a method wherein an N<+> diffusion layer is formed on the surface of the base region located between an emitter region and a collector region. CONSTITUTION:As a high density impurity layer (N<+> diffusion layer) is formed on the surface of a base region 17, the region located between each of the P<-> regions on the lower side of the N<+> diffusion layer is brought into the state wherein it functions as an actual base region, and the irregularity in hFE characteristics, caused by the contamination and the like on the surface of a substrate due to the decrease in the degree of clealiness of the diffusion furnace used in an SiO2 film forming process, can be prevented. In the above-mentioned case, it is desirable that the N<+> diffusion layer is formed as thin as possible on condition that the layer displays the above- mentioned efficiency. Also, as an emitter region 15 has the P<+> diffusion region in the center part of the P<-> region, an emitter injection efficiency is enhanced, and the hFE characteristics can be increased to 100 or above, for example, without narrowing the base width and also without reducing its breakdown strength. Besides, as a collector region 16 has the P<+> diffusion region in the center part of the P<-> region, collector series resistance is lowered, and VCE(SAT) (saturated voltege between collector end emitter regions) can also be brought down.

Inventors

• 👤 Yoshihiro Motowaki
• 👤 本脇　喜博

Bibliographic Details