← Back to Patent Explorer
JPS6370441A Expired / Lapsed JP ⏱️ 0.0 years remaining

Integrated circuit device

Assignee: NEC Corp
•
Filing: 1986-09-11
•
Granted: —
•
Expires: 2006-09-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To save the mounting area for a bypass capacitor on a printed circuit board and to improve the circuit board reliability by providing a ceramic package with such a capacitor for suppressing noises. CONSTITUTION:The integrated circuit device is composed of a ceramic plate 1 on the upper surface side, a cement junction part 2, an upper ceramic plate 3 on the bottom surface side, a lower ceramic plate 4 on the bottom surface side and outer terminals 5. The upper ceramic plate 3 on the bottom surface side and the lower ceramic plate 4 on the bottom surface side are bonded with a bonding agent so as to fill a gap. At this time, a capacitor 6 and a junction part 7, which are projecting from the junction surface of the upper ceramic plate 3 on the bottom surface side are housed in a recess part 9, which is provided in the lower ceramic plate 4 on the bottom surface side. When this integrated circuit including the capacitor 6 is mounted on a printed circuit board, no mounting area is required for an external bypass capacitor which is conventionally used. Since the capacitor 6 is enclosed in the ceramic package having high moisture resistance, the circuit board reliability can be improved.

Inventors

  • 👤 Norio Sugimoto
  • 👤 杉本 則郎

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-07 18:16
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag