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JPS63671A Expired / Lapsed JP ⏱️ 0.0 years remaining

Image processor

Assignee: Olympus Corp
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Filing: 1986-06-20
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Granted: —
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Expires: 2006-06-20
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Abstract

Abstract PURPOSE:To make provision of an address controlling circuit on every image memory unnecessary by constituting an image bus of at least a data bus and an address bus, so that an address unit for generating all necessary addresses can be connected. CONSTITUTION:An image bus 18 is constituted of a data bus 18-1, an address bus 18-2, and a control bus 18-3. Also, a D/A converter 13, A/D converters 15-1, 15-2, and an image processing processor 16 are connected to the data bus 18-1 and the control bus 18-3, and an image memory 14 is connected to the data bus 18-1 and the address bus 18-2, and an address unit 17 is connected to the address bus 18-2. In such a way, when the address bus is provided on the image bus, the address unit for generating all addresses required for the image bus can be connected thereto, therefore, provision of an address control ling circuit on every image memory is made unnecessary.

Inventors

  • 👤 Akira Matsueda
  • 👤 松枝 晃

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-25 20:47
CPC Classifications
—

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