Crt display device

Abstract

Abstract PURPOSE:To improve the processing efficiency of the computer system by providing a 1st clock system synchronizing an external synchronizing signal with a computer synchronizing signal and a 2nd clock system controlling the access timing of a video RAM. CONSTITUTION:The 1st clock system 10 comprises the 1st clock frequency division circuit 12, a horizontal/vertical synchronizing signal generating circuit 14 and a synchronizing matching circuit 16. The 2nd clock system 20 comprises a, 2nd clock frequency division circuit 22, FFs 1, 2 and gate circuits G1, G2. Since the circuit 22 is in operation even with the synchronizing period between the computer synchronizing signal and the external synchronizing signal by the system 10, the CPU accesses the video RAM. The circuit 22 is stopped for the phase difference between the 1st and 2nd clocks to inhibit the access from the CPU. The phase difference is within one cycle of both the clocks, then the period inhibiting the access is slight.

Inventors

• 👤 Masayuki Eto
• 👤 正幸 江藤

Bibliographic Details