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JPS6358667A Expired / Lapsed JP ⏱️ 0.0 years remaining

Slicing circuit for digital data

Assignee: Toshiba Corp
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Filing: 1986-08-29
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Granted: —
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Expires: 2006-08-29
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Abstract

Abstract PURPOSE:To automatically set the slicing level of the record signal itself by sampling/holding both positive and negative peak values of a data synchronizing signal to obtain the average voltage level of both held values and defining this average voltage level as a digital slicing level to perform the waveform shaping. CONSTITUTION:The video waveform signals received from an input terminal 1 are supplied to an amplifier 12 and a synchronizing separator 20 and these amplified signals are applied to peak value wave detecting circuits 13 and 14 to sample the positive and negative peaks of the data synchronizing signal. The sampled peak value is held by a sampling/holding circuit 15 and the average voltage level of the peak value is obtained by an average voltage circuit 16. Then the average voltage level is applied to a comparator 17 and the input video waveform signal undergoes the waveform shaping to deliver the digital data with the average voltage level defined as a slicing level. The circuits 13-16 are controlled by the timing of monostable multivibrators 21-23 which process the horizontal synchronizing signals sent from the circuit 20. Then the data slicing level is set at 50-60% of an input signal.

Inventors

  • 👤 Akira Toba
  • 👤 鳥羽 彰

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 16:03
CPC Classifications
—

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