← Back to Patent Explorer
JPS6344776A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device using quantum well

Assignee: Japan Science and Technology Agency
•
Filing: 1986-08-12
•
Granted: —
•
Expires: 2006-08-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To obtain light bistable device which are highly sensitive and exhibit a quick response by connecting a quantum well in series to a non-linear resistance element where optical absorption characteristics convert a high absorption coefficient into a low abosorption coefficient at a specific wave length region. CONSTITUTION:A quantum well is composed of laminated thin films; for example, the thin films 2 are interposed between the thin films 3 having different compositions from those of the thin films 2. The quantum well has absorption characteristics for incident light where it has a high absorption coefficient toward wave lengths of the light that are less than a certain extent. What is more, it is preferable for the quantum well to have hysteresis characteristics by the following interactions: its well is not only assembled into a certain rectifier junction such as P-N junction or Schottky junction but also connected to a non-linear resistance element 4 having a negative resistance characteristic and allows a power source 1 to be connected to both ends of the above element so that a constant voltage V3 is impressed. In other words, this quantum well varies electric currents depending on intensity of beams of incident light as well as their wave lengths. On the other hand, the non-linear resistance element increases the electric currents in proportion to electric voltages to a certain extent of the voltages but once the voltages exceed such a certain extent, a resistance increases rapidly and the electric currents decrease in reverse proportion to the voltages. Thus, a combination of both the well and the element enables the light bistable devices where an input/output relation of the light describes a hysteresis loop.

Inventors

  • 👤 Hiroyuki Sakaki
  • 👤 裕之 榊
  • 👤 Masahiro Tsuchiya
  • 👤 昌弘 土屋
  • 👤 Masamichi Yamanishi
  • 👤 正道 山西

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 04:32
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag