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JPS6342146A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor

Assignee: NEC Corp
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Filing: 1986-08-08
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Granted: —
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Expires: 2006-08-08
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Abstract

Abstract PURPOSE:To obtain the structure of excellent multilyer interconnections without step cutting and the like, by smoothing the edge part of a conductor layer comprising polycrystalline silicon. CONSTITUTION:A polycrystalline silicon film 3 is entirely etched until the thin part beneath an oxide film 6 is eliminated. With the remaining polycrystalline silicon film 3 as a mask, a gate oxide film 2 is removed. Then, a second gate oxide film 8 and an insulating oxide film 9 are formed on the exposed surface of a silicon substrate 1 and the polycrystalline silicon film 3 by hydrogen burning oxidation. The gate oxide film 8 is removed by wet etching. A second gate oxide film 8a is formed again by dry oxidation this time. At this time, the insulating oxide film 9 is also etched once. An oxide film 9a is obtained by dry oxidation. A polycrystalline silicon film 10 is deposited on the gate oxide film 8a and the oxide film 9a to form the upper conductor layer. Thus the conductor layer, which comprises a polycrystalline silicon layer and has a smooth edge, is formed.

Inventors

  • 👤 Shuichi Enomoto
  • 👤 秀一 榎本

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 00:59
CPC Classifications
—

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