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JPS6337646A Expired / Lapsed JP ⏱️ 0.0 years remaining

C-mos output circuit

Assignee: Fujitsu Ltd
•
Filing: 1986-07-31
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Granted: —
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Expires: 2006-07-31
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Abstract

Abstract PURPOSE:To prevent an output circuit from being broken due to static electricity, by making the connections of zenor diodes between sources and drains of MOS-type field effect transistors(FET). CONSTITUTION:Both drains of MOS-type FETs 2 and 3 are connected with an output terminal 4 through a resistor R1. A cathode of a zenor diode ZD1 is connected with a source of the MOS-type FET 2 (C-MOS's drain), and an anode of a zenor diode ZD2 is connected with a source of the MOS-type FET 3. Besides, the anode of the zenor diode ZD1 and the cathode of the zenor diode ZD2 are connected together at a connection point between the resistor R1 and the output terminal 4. Even if large positive and negative noises are caused by static electricity on the output terminal 4, they can be absorbed, for example, by characteristics of the zenor diodes ZD1 and ZD2 having breakdown voltages smaller than gate-withstand voltage, and then current can be limited by the resistor R1. Hence, the C-MOS output circuit can be protected against an electrostatic stress.

Inventors

  • 👤 Takeshi Sasaki
  • 👤 佐々木 竹志
  • 👤 Ataru Kumagai
  • 👤 熊谷 中
  • 👤 Hideo Monma
  • 👤 門馬 秀夫

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 14:33
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/611

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