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JPS63276263A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: NEC Corp
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Filing: 1987-05-08
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Granted: —
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Expires: 2007-05-08
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Abstract

Abstract PURPOSE:To enable an element to be constructed finely, by utilizing a polycrystalline silicon film used for filling a trench isolating groove also for a highly doped region located directly below an aperture for leading out a substrate potential. CONSTITUTION:On a P-type silicon substrate 1, there are provided an N<+>type buried layer 2, an N-type epitaxial layer 3, a silicon oxide film 7', a silicon nitride film 8, a silicon oxide film 9 and a patterned resist film 10. Then, grooves are excavated vertically by the RIE process for providing trench isolating grooves 4. The structure is subjected to thermal oxidation and RIE so that a silicon oxide film 4a is left only on the side walls of the grooves. A polycrystalline silicon film 11 is then deposited all over the surface. The structure is subjected to etching back and thermal oxidation in order to provide polycrystalline silicon films 4b filling the grooves, a silicon oxide film 12 and a high-concentration P<+> buried layer 4c. Finally, a field oxide film 7 and apertures 6 for leading out a substrate potential are provided.

Inventors

  • 👤 Hisashi Takemura
  • 👤 武村 久

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 12:41
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS57143843A Cited

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