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JPS63254746A Expired / Lapsed JP ⏱️ 0.0 years remaining

Formation of interconnection

Assignee: Sony Corp
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Filing: 1987-04-11
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Granted: —
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Expires: 2007-04-11
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Abstract

Abstract PURPOSE:To stably attain flattening, by forming a flattening film on the first conductive layer on an insulating film having a step so as to be etched and forming the second conductive layer to make it possible to simultaneously and selectively etch the first and the second conductive layers. CONSTITUTION:A lower layer aluminium interconnection 2 is formed on SiO21 which makes a foundation, and reflecting this, an insulating film 3 thereon has a step 32. The first conductive layer 4 is formed on the insulating film 3 having such a step followed by forming a flattening film 5 such as a resist on this first conductive layer 4. Next, the flattening film 5 and the first conductive layer are wholly etched to make the first conductive layer 4 into the almost flat surface and to form the second conductive layer 6 on the first conductive layer 4. Then, the first conductive layer 4 and the second conductive layer 6 are simultaneously and selectively etched for patterning so as to obtain a necessary interconnection.

Inventors

  • 👤 Masataka Shingu
  • 👤 新宮 正孝

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 16:26
CPC Classifications
—

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS57157543A Cited
JPS57154543A Cited
JPS61136244A Cited

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