Pad in integrated circuit chip and formation thereof

Abstract

Abstract PURPOSE:To improve the manufacture yield and reliability of a semiconductor integrated circuit using a bump by isolating in the bump formation region the bump material and the pad layer by means of a barrier metal layer, thereby preventing the attack on the pad layer under the bump by the etchant. CONSTITUTION:On a pad 11, a region dedicated to the probe test and a region for bump formation are provided, and the opening corresponding to the region used for the probe test is masked by a layer 16 of a material having a corrosion resistance against the etchant which is used for removing a barrier metal layer 15. Thus, in the bump formation region, the pad material 11 is prevented from being dissolved and lost into a bump material 17 and simultaneously therewith, in the removal of the excessive barrier metal layer 15 which is performed after the formation of the bump 17, the attack of the aluminium layer under the bump 17 is prevented. With this, the wire breaking failure at the pad section 11 is precluded.

Inventors

• 👤 Hitoshi Hasegawa
• 👤 長谷川　斉

Bibliographic Details