Semiconductor memory and manufacture thereof

Abstract

Abstract PURPOSE:To easily control the gate threshold value by a method wherein a groove with an opening formed into tapered surfaces is formed to make use of the tapered surfaces so that a transfer transistor Tr may be formed three- dimensionally together with a capacitor. CONSTITUTION:A field oxide films 22 are formed on a part of P-type Si substrate 21. After forming a groove 26 in the substrate 21, a groove 26 is formed for its opening to include tapered surfaces 260 and 261. Besides, impurity n<+> source-drain regions 23 are formed on the peripheral parts of the opening of groove 26 including the taper parts 260 and 261. On the other hand, an impurity n-layer 28 is formed along the sidewalls and bottom of groove 26 to form a capacitor electrode 30 insulated by the layer 28 and a capacitor oxide film 29 in the groove 26. Furthermore, a gate oxide film 32 is formed on the taper surfaces of groove 26 further to form a transfer gate electrode 33 on the film 32. Through these procedures, a transfer transistor Tr is formed by the layers 23 and 28 and the electrode 33 while a capacitor for memory is formed by the layer 28, the film 29 and the electrode 30. In such a constitution, impurity can be implanted easily.

Inventors

• 👤 Hiroyuki Nomichi
• 👤 野路　宏行

Bibliographic Details