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JPS63216366A Expired / Lapsed JP ⏱️ 0.0 years remaining

Package for integrated circuit

Assignee: Fujitsu Ltd
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Filing: 1987-03-05
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Granted: —
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Expires: 2007-03-05
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Abstract

Abstract PURPOSE:To adjust the line impedance of terminals and reduce the development of crosstalk between the terminals, thereby minimizing intervals between the terminals, by mounting protruding parts to correspond to the terminals so that its protruding parts jut out towards an earthing conductor facing the plane where the terminals are arranged through a dielectric substrate without penetrating into the dielectric substrate. CONSTITUTION:A package for IC has an external connecting terminal part 15 where an IC chip C is housed at the inside and a plurality of leadlike terminals 12 which connect its chip with external circuits are arranged sideways and the package allows the external connecting terminal part 15 to have a structure where the above terminals 12 are arranged at a seam plane at which two dielectric substrates 11 and 13 are fixed by laying its substrate on the top of another. Further, an earthing conductor 14 having protruding parts 16 which jut out in the dielectric substrate 11 without penetrating into the dielectric substrate 11 in a region between arrangement regions of respective terminals 12 or respective terminals is mounted at the outside surface of either dielectric substrate 11 at least. Thus, the earthing conductor 14 has a bandlike protruding parts 16 which protrude in parallel with the terminals 12 without penetrating into the dielectric substrate 11, for example, at a part between the terminals 12 in line as well as directly below both sides of the terminals.

Inventors

  • 👤 Norio Hidaka
  • 👤 日高 紀雄
  • 👤 Yasutaka Hirachi
  • 👤 康剛 平地

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 18:15
CPC Classifications
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